In the fabrication of semiconductor devices such as integrated circuits, memory cells, and the like, a series of manufacturing operations are performed to define features on semiconductor wafers (“wafers”). The wafers include integrated circuit devices in the form of multi-level structures defined on a silicon substrate. At a substrate level, transistor devices with diffusion regions are formed. In subsequent levels, interconnect metallization lines are patterned and electrically connected to the transistor devices to define a desired integrated circuit device. Also, patterned conductive layers are insulated from other conductive layers by dielectric materials.
During the series of manufacturing operations, the wafer surface is exposed to various types of contaminants. Essentially any material present in a manufacturing operation is a potential source of contamination. For example, sources of contamination may include process gases, chemicals, deposition materials, and liquids, among others. The various contaminants may deposit on the wafer surface in particulate form. If the particulate contamination is not removed, the devices within the vicinity of the contamination will likely be inoperable. Thus, it is necessary to clean contamination from the wafer surface in a substantially complete manner without damaging the features defined on the wafer. However, the size of particulate contamination is often on the order of the critical dimension size of features fabricated on the wafer. Removal of such small particulate contamination without adversely affecting the features on the wafer can be quite difficult.
Conventional wafer cleaning methods have relied heavily on mechanical force to remove particulate contamination from the wafer surface. As feature sizes continue to decrease and become more fragile, the probability of feature damage due to application of mechanical force to the wafer surface increases. For example, features having high aspect ratios are vulnerable to toppling or breaking when impacted by a sufficient mechanical force. To further complicate the cleaning problem, the move toward reduced feature sizes also causes a reduction in the size of particulate contamination. Particulate contamination of sufficiently small size can find its way into difficult to reach areas on the wafer surface, such as in a trench surrounded by high aspect ratio features. Thus, efficient and non-damaging removal of contaminants during modern semiconductor fabrication represents a continuing challenge to be met by continuing advances in wafer cleaning technology. It should be appreciated that the manufacturing operations for flat panel displays suffer from the same shortcomings of the integrated circuit manufacturing discussed above.
Many times, solutions that are engineered for cleaning surfaces are not sufficiently stable, and over time, their consistencies may change. An example of changes in consistencies is when materials in the solutions either float to the top or sink to the bottom. If this happens, there is a need for re-mixing, or reconfirming the solution so that it can still be applied to the surface of the substrate and the anticipated action/result of the solution will still be valid. For this reason, some solutions cannot be made and stored for later use, as the solution many not properly function without extra testing or reconditioning.
In view of the forgoing, there is a need for solutions that can be made, stored, and used at later times, without the need for extra testing, sampling, re-agitation, re-conditioning, re-mixing, or the like.